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Volumn 1035, Issue , 1996, Pages 129-138

Design trade-offs for real-time block-matching motion estimation algorithms

Author keywords

[No Author keywords available]

Indexed keywords

COMMERCE; COMPUTER VISION; ECONOMIC AND SOCIAL EFFECTS; MOTION COMPENSATION;

EID: 21844516378     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-60793-5_68     Document Type: Conference Paper
Times cited : (2)

References (12)
  • 3
  • 4
    • 0019714747 scopus 로고
    • Motion compensated interframe coding for video conferencing
    • New Orleans, LA, Nov. 29, Dec
    • T. Koga, K. Iinuma, A, Hirano, Y. Iijima, and T. Ishiguro, "Motion compensated interframe coding for video conferencing," Proc. Nat. Telecommun. Conf., New Orleans, LA, Nov. 29, Dec. 1981, pp. G5. 3. 1-5. 3. 5.
    • (1981) Proc. Nat. Telecommun. Conf , pp. G5.3.1-G5.3.5
    • Koga, T.1    Iinuma, K.2    Hirano, A.3    Iijima, Y.4    Ishiguro, T.5
  • 5
    • 0024755322 scopus 로고
    • A family of VLSI designs for the motion compensation block-matching algorithm
    • Oct
    • K. M. Yang, M. T. Sun and L. Wu, "A family of VLSI designs for the motion compensation block-matching algorithm," IEEE Transactions on Circuits and Systems, vol. 36, No. 10, pp. 1317-1325, Oct. 1989.
    • (1989) IEEE Transactions on Circuits and Systems , vol.36 , Issue.10 , pp. 1317-1325
    • Yang, K.M.1    Sun, M.T.2    Wu, L.3
  • 7
    • 0024753317 scopus 로고
    • Array architecture for block matching Algorithms
    • T. Komarek and P. Pirsch, "Array architecture for block matching Algorithms," IEEE Transaction on Circuits and Systems, Vol. 36, No. 10, pp. 1301-1308, 1989.
    • (1989) IEEE Transaction on Circuits and Systems , vol.36 , Issue.10 , pp. 1301-1308
    • Komarek, T.1    Pirsch, P.2
  • 9
    • 0024754362 scopus 로고
    • Parameterizable VLSI architecture for the full-search block-matching algorithm
    • L. D. Vos and M. Stegherr, "Parameterizable VLSI architecture for the full-search block-matching algorithm," IEEE Trans, on Circuits and System, Vol. 36, No. 10, pp. 1309-1316. 1989.
    • (1989) IEEE Trans, on Circuits and System , vol.36 , Issue.10 , pp. 1309-1316
    • Vos, L.D.1    Stegherr, M.2
  • 11
    • 0028480896 scopus 로고
    • Parallel architectures for 3-step hierarchical search block-matching algorithm
    • August
    • H. M. Jong, L. G. Chen, T. D. Chiueh, "Parallel architectures for 3-step hierarchical search block-matching algorithm," IEEE Trans, on Circuits and System for Video Technology, vol. 4, No. 4, pp. 407-416, August 1994.
    • (1994) IEEE Trans, on Circuits and System for Video Technology , vol.4 , Issue.4 , pp. 407-416
    • Jong, H.M.1    Chen, L.G.2    Chiueh, T.D.3
  • 12
    • 0027543616 scopus 로고
    • An efficient and simple VLSI tree architecture for motion estimation algorithms
    • Feb
    • Y. S. Jehng, L. G. Chen and T. D. Chiueh, "An efficient and simple VLSI tree architecture for motion estimation algorithms," IEEE Trans, on Signal Processing, Vol. 41, No. 2, pp. 889-900, Feb., 1993.
    • (1993) IEEE Trans, on Signal Processing , vol.41 , Issue.2 , pp. 889-900
    • Jehng, Y.S.1    Chen, L.G.2    Chiueh, T.D.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.