A new methodology for low delay real-time videophone software architecture design

IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Volumn 2, Issue , 2002, Pages 269-273

  Adiono, R ^a   Isshiki, T ^a   Li, Dongju ^a   Kunieda, H ^a  

^a TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

Delay; Design methodology; High performance computing; Multithreading; Processor scheduling; Programmable control; Software architecture; Software design; Videophone systems; Yarn

Indexed keywords

IMAGE CODING; MOBILE PHONES; MULTITASKING; SCHEDULING; SOFTWARE ARCHITECTURE; VIDEO TELEPHONE EQUIPMENT; YARN;

DELAY; DESIGN METHODOLOGY; HIGH PERFORMANCE COMPUTING; MULTI-THREADING; PROCESSOR SCHEDULING; PROGRAMMABLE CONTROLS; VIDEOPHONE SYSTEMS;

SOFTWARE DESIGN;

EID: 21844463780     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APCCAS.2002.1115224     Document Type: Conference Paper

References (8)

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