Multicontext dynamic reconfiguration and real-time probing on a novel mixed signal programmable device with on-chip microprocessor

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1304, Issue , 1997, Pages 1-10

  Faura, Julio ^a   Moreno, Juan Manuel ^b   Aguirre, Miguel Angel ^c   Van Duong, Phuoc ^d   Insenser, Josep Maria ^a  

^a PTM   (Spain)

^b UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

^c UNIVERSITY OF SEVILLE   (Spain)

^d MIKRON GmbH   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 21744450114     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-63465-7_205     Document Type: Conference Paper

References (12)

1. D. Anderson, C. Marcjan et al, “A Field Programmable Analog Array and Its Application”, 1997 IEEE Custom Integrated Circuits Conference, Santa Clara (CA, USA).
2. Hans W. Klein, “The EPAC architecture: an expert cell approach to field programmable analogue devices”, FPGA’96, Monterrey CA.
3. “Analog-Silicon-Breadboard - an analogue FPGA”, Fraunhofer-Institut fur Mikrolektronische Schaltungen un Systeme, IMS2 Dresden (commercial communication).
4. th Canadian Workshop on Field-Programmable Devices, 1996 Toronto, Canada.
5. Julio Faura, Chris Horton, Phuoc van Duong, Jordi Madrenas, Miguel A. Aguirre, and Josep M. Insenser “A Novel Mixed Signal Programmable Device with On-Chip Microprocessor”, 1997 IEEE Custom Integrated Circuits Conference, Santa Clara (CA, USA).
6. Stephen Churcher, Tom Kean and Bill Wilkie, “The XC6200 fastMapTM processor interface”, European FPL’95, Oxford (UK).
7. H.F. Silverman et al, “Processor Reconfiguration Through Instruction-Set Metamorphosis”, IEEE Computer, 23 (3) March 1993.
8. Neil Hastie and Richard Cliff, “The implementation of hardware subroutines on field programmable gate arrays”, 1990 IEEE Custom Integrated Circuits Conference.
9. Neil Hastie and Richard Cliff, “The implementation of hardware subroutines on field programmable gate arrays”, IEEE 1990 CICC.
10. E. Tau, D. Chen, I. Eslick, J. Brown and A. DeHon, “A First Generation DPGA Implementation”, FPD’95 - Third Canadian Workshop of Field-Programmable Devices, 1995 Montreal, Canada.
11. Patrick Lysaght and John Dunlop, “Dynamic reconfiguration of FPGAs”, European FPL’93, Oxford (UK), pp 82-94.
12. Patrick Lysaght and Jon Stockwood, “A Simulation Tool for Dynamically Reconfigurable Field Programmable Gate Arrays”, IEEE transactions on VLSI systems, vol. 4, nr. 3, September 1996.