Whole execution traces

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

Volumn , Issue , 2004, Pages 105-116

  Zhang, Xiangyu ^a   Gupta, Rajiv ^a  

^a University of Arizona   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CODE SPECIALIZATION; LOSSLESS COMPRESSION TECHNIQUES; PROGRAM PROFILES; WHOLE EXECUTION TRACES (WET);

ALGORITHMS; BENCHMARKING; COMPUTER ARCHITECTURE; COMPUTER SOFTWARE; DATA COMPRESSION; GRAPH THEORY; OPTIMIZATION;

COMPUTER SCIENCE;

EID: 21644486871     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (28)

1. T. Ball, and J. Larus, "Efficient Path Profiling," IEEE/ACM International Symp. on Microarchitecture (MICRO), pages 46-57, Dec. 1996.
2. R. Bodik, R. Gupta and M.L. Soffa, "Complete Removal of Redundant Expressions," ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), pages 1-14, Montreal, Canada, June 1998.
3. M. Burtscher and M. Jeeradit, "Compressing Extended Program Traces Using Value Predictors," 12th International Conference on Parallel Architectures and Compilation Techniques (PACT), pages 159-169, September 2003.
4. M. Burtscher, "VPC3: A Fast and Effective Trace-compression Algorithm," pages 167-176, SIGMETRICS 2004.
5. M. Burtscher and B.G. Zorn, "Exploring Last n Value Prediction," International Conference on Parallel Architectures and Compilation Techniques (PACT), pages 66-76, October 1999.
6. B. Calder, P. Feller and A. Eustace, "Value Profiling," The 30th IEEE/ACM International Symposium on Microarchitecture (MICRO), pages 259-269, December 1997.
7. T.M. Chilimbi, "Efficient Representations and Abstractions for Quantifying and Exploiting Data Reference Locality," ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), pages 191-202, Snowbird, Utah, June 2001.
8. T.M. Chilimbi and M. Hirzel, "Dynamic Hot Data Stream Prefetching for General-Purpose Programs," ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), pages 199-209, 2002.
9. B. Goeman, H. Vandierendonck, and K. Bosschere, "Differential FCM: Increasing Value Prediction Accuracy by Improving Table Usage Efficiency," Seventh International Symposium on High Performance Computer Architecture (HPCA), pages 207-216, Jan. 2001.
10. R. Gupta, D. Berson, and J.Z. Fang, "Path Profile Guided Partial Redundancy Elimination Using Speculation," IEEE International Conference on Computer Languages (ICCL), pages 230-239, Chicago, Illinois, May 1998.
11. Q. Jacobson, E. Rotenberg, and J.E. Smith, "Path-Based Next Trace Prediction," The 30th IEEE/ACM International Symposium on Microarchitecture (MICRO), December 1997.
12. D. Joseph and D. Grunwald, "Prefetching Using Markov Predictors," International Symposium on Computer Architecture (ISCA), pages 252-263, 1997.
13. A.J. KleinOsowski and D.J. Lilja, " MinneSPEC: A New SPEC Benchmark Workload for Simulation-Based Computer Architecture Research," Computer Architecture Letters, Vol. 1, June 2002.
14. J.R. Larus, "Whole Program Paths," ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), pages 259-269, Atlanta, GA, may 1999.
15. M. H. Lipasti and J. P. Shen, "Exceeding the Dataflow Limit via Value Prediction," 29th IEEE/ACM International Symposium on Microarchitecture (MICRO), pages 226-237, Dec. 1996.
16. C. G. Nevil-Manning and I.H. Witten, "Linear-time, Incremental Hierarchy Inference for Compression," Data Compression Conference (DCC), Snowbird, Utah, IEEE Computer Society, pages 3-11, 1997.
17. E. Perelman, G. Hamerly, M.V. Biesbrouck, T. Sherwood, and B. Calder, "Using SimPoint for Accurate and Efficient Simulation," ACM BIOMETRICS the International Conference on Measurement and Modeling of Computer Systems, June 2003.
18. S. Rubin, R. Bodik, and T. Chilimbi, "An Efficient Profile-Analysis Framework for Data Layout Optimizations," The 29th ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL), Portland, Oregon, Jan. 2002.
19. Y. Sazeides and J.E. Smith, "The Predictability of Data Values," 30th IEEE/ACM International Symposium on Microarchitecture (MICRO), December 1997.
20. Y. Sazeides and J.E. Smith, "Implementations of Context Based Value Predictors," Technical Report ECE-97-8, University of Wisconsin-Madison. Dec. 1997.
21. Y. Sazeides, "Instruction-Isomorphism in Program Execution," Value Prediction Workshop (held with ISCA), June 2003.
22. The Trimaran Compiler Research Infrastructure. Tutorial Notes, November 1997.
23. J. Yang and R. Gupta, "Frequent Value Locality and its Applications," ACM Transactions on Embedded Computing Systems (TECS), special inaugural issue on memory systems, Vol. 1, No. 1, pages 79-105, November 2002.
24. C. Young and M.D. Smith, "Better Global Scheduling Using Path Profiles," IEEE/ACM International Symposium on Microarchitecture (MICRO), pages 115-123, 1998.
25. X. Zhang and R. Gupta, "Cost Effective Dynamic Program Slicing," ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), Washington D.C., June 2004.
26. Y. Zhang and R. Gupta, "Timestamped Whole Program Path Representation and its Applications," ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), pages 180-190, Snowbird, June 2001.
27. Y. Zhang and R. Gupta, "Data Compression Transformations for Dynamically Allocated Data Structures," International Conference on Compiler Construction (CC), Grenoble, France, April 2002.
28. C.B. Zilles and G. Sohi, "Understanding the Backward Slices of Performance Degrading Instructions," ACM/IEEE 27th International Symposium on Computer Architecture (ISCA), 2000.