-
2
-
-
1542359166
-
Optimal body bias selection for leakage improvement and process compensation over different technology generations
-
C. Neau and K. Roy, "Optimal body bias selection for leakage improvement and process compensation over different technology generations," ISLPED, pp. 116-121, 2003.
-
(2003)
ISLPED
, pp. 116-121
-
-
Neau, C.1
Roy, K.2
-
3
-
-
84962299846
-
Evaluating run-time techniques for leakage power reduction
-
S. Duarte, Y. Tsai, N. Vijaykrishnan, and M. Irwin, "Evaluating run-time techniques for leakage power reduction," VLSID'02, 2002.
-
(2002)
VLSID'02
-
-
Duarte, S.1
Tsai, Y.2
Vijaykrishnan, N.3
Irwin, M.4
-
4
-
-
1542269359
-
Design methodology for fine-grained leakage control in mtc-mos
-
B. H. Calhoun, F. A. Honore, and A. Chandrakasan, "Design methodology for fine-grained leakage control in mtc-mos," ISLPED, pp. 104-109, 2003.
-
(2003)
ISLPED
, pp. 104-109
-
-
Calhoun, B.H.1
Honore, F.A.2
Chandrakasan, A.3
-
5
-
-
0032640861
-
Leakage control with efficient use of transistor stacks in single threshold cmos
-
M. Johnson, D. Somasekhar, and K. Roy, "Leakage control with efficient use of transistor stacks in single threshold cmos," DAC, pp. 442-445, 1999.
-
(1999)
DAC
, pp. 442-445
-
-
Johnson, M.1
Somasekhar, D.2
Roy, K.3
-
6
-
-
0030712582
-
A gate-level leakage power reduction method for ultra low power cmos circuits
-
J. Halter and F. Najm, "A gate-level leakage power reduction method for ultra low power cmos circuits," CICC, pp. 475-478, 1997.
-
(1997)
CICC
, pp. 475-478
-
-
Halter, J.1
Najm, F.2
-
7
-
-
0031103046
-
Dynamic threshold-voltage mosfet (dtmos) for ultra-low voltage vlsi
-
Mar
-
F. Assaderaghi, D. Sinitsky, S. A. Parke, J. Bokor, P. Ko, and C. Hu, "Dynamic threshold-voltage mosfet (dtmos) for ultra-low voltage vlsi, " IEEE Trans. on Elec. Dev., vol. 44, no. 3, pp. 414-422, Mar 1997.
-
(1997)
IEEE Trans. on Elec. Dev.
, vol.44
, Issue.3
, pp. 414-422
-
-
Assaderaghi, F.1
Sinitsky, D.2
Parke, S.A.3
Bokor, J.4
Ko, P.5
Hu, C.6
-
8
-
-
0029488569
-
A scheduling model for reduced cpu energy
-
F. Yao, A. Demers, and S. Shenker, "A scheduling model for reduced cpu energy," IEEE Annual Foundations of Comp. Sci., pp. 374-382, 1995.
-
(1995)
IEEE Annual Foundations of Comp. Sci.
, pp. 374-382
-
-
Yao, F.1
Demers, A.2
Shenker, S.3
-
9
-
-
0031625463
-
Voltage scheduling problem for dynamically variable voltage processors
-
August
-
T. Ishihara and H. Yasuura, "Voltage scheduling problem for dynamically variable voltage processors," ISLPED, pp. 197-202, August 1998.
-
(1998)
ISLPED
, pp. 197-202
-
-
Ishihara, T.1
Yasuura, H.2
-
10
-
-
0035680483
-
Dynamic and aggressive scheduling techniques for power aware real-time systems
-
H. Aydin, R. Melhem, D. Mosse, and P. Alvarez, "Dynamic and aggressive scheduling techniques for power aware real-time systems," IEEE Real-Time System Symposium, 2001.
-
(2001)
IEEE Real-time System Symposium
-
-
Aydin, H.1
Melhem, R.2
Mosse, D.3
Alvarez, P.4
-
12
-
-
0032688679
-
Power conscious fixed priority scheduling for hard real-time systems
-
Y. Shin and K. Choi, "Power conscious fixed priority scheduling for hard real-time systems," DAC, pp. 134-139, 1999.
-
(1999)
DAC
, pp. 134-139
-
-
Shin, Y.1
Choi, K.2
-
13
-
-
0034483995
-
Power optimization of real-time embedded systems on variable speed processors
-
Y. Shin, K. Choi, and T. Sakurai, "Power optimization of real-time embedded systems on variable speed processors," International Conference on Computer-Aided Design, pp. 365-368, 2000.
-
(2000)
International Conference on Computer-aided Design
, pp. 365-368
-
-
Shin, Y.1
Choi, K.2
Sakurai, T.3
-
14
-
-
0034854528
-
Energy efficient fixed-priority scheduling for real-time systems on voltage variable processors
-
G. Quan and X. S. Hu, "Energy efficient fixed-priority scheduling for real-time systems on voltage variable processors," DAC, pp. 828-833, 2001.
-
(2001)
DAC
, pp. 828-833
-
-
Quan, G.1
Hu, X.S.2
-
15
-
-
0042593198
-
Minimum energy fixed-priority scheduling for variable voltage processors
-
G. Quan and X. Hu, "Minimum energy fixed-priority scheduling for variable voltage processors," 2002 European Design and Test Conference, 2002.
-
(2002)
2002 European Design and Test Conference
-
-
Quan, G.1
Hu, X.2
-
16
-
-
80052451482
-
On energy optimal voltage scheduling for fixed-prioirty hard real-time systems
-
H.-S. Yun and J. Kim, "On energy optimal voltage scheduling for fixed-prioirty hard real-time systems," ACM Transactions on Embedded Computing Systems, vol. vol 2, 2003.
-
(2003)
ACM Transactions on Embedded Computing Systems
, vol.2
-
-
Yun, H.-S.1
Kim, J.2
-
17
-
-
1542329187
-
Dynamic voltage scaling algorithm for fixed-priority real-time systems using work-demand analysis
-
W. Kim, J. Kim, and S.L.Min, "Dynamic voltage scaling algorithm for fixed-priority real-time systems using work-demand analysis," ISLPED, 2003.
-
(2003)
ISLPED
-
-
Kim, W.1
Kim, J.2
Min, S.L.3
-
18
-
-
84884678983
-
Scheduling techniques for reducing leakage power in hard real-time systems
-
Y. Lee, K. Reddy, and C. Krishna, "Scheduling techniques for reducing leakage power in hard real-time systems," ECRTS, 2003.
-
(2003)
ECRTS
-
-
Lee, Y.1
Reddy, K.2
Krishna, C.3
-
20
-
-
4444368993
-
Leakage aware dynamic voltage scaling for real-time embedded systems
-
R. Jejurikar, C. Pereira, and R. Gupta, "Leakage aware dynamic voltage scaling for real-time embedded systems," DAC, pp. 275-280, 2004.
-
(2004)
DAC
, pp. 275-280
-
-
Jejurikar, R.1
Pereira, C.2
Gupta, R.3
-
21
-
-
84974687699
-
Scheduling algorithms for multiprogramming in a hard real-time environment
-
C. L. Liu and J. W. Layland, "Scheduling algorithms for multiprogramming in a hard real-time environment," Journal of the ACM, vol. 17, no. 2, pp. 46-61, 1973.
-
(1973)
Journal of the ACM
, vol.17
, Issue.2
, pp. 46-61
-
-
Liu, C.L.1
Layland, J.W.2
-
23
-
-
0029273434
-
Optimal priority assignment for aperiodic tasks with firm deadlines in fixed-priority preemptive systems
-
R. Davis and A. Burns, "Optimal priority assignment for aperiodic tasks with firm deadlines in fixed-priority preemptive systems," Information Processing Letters, vol. 53, no. 5, pp. 249-254, 1995.
-
(1995)
Information Processing Letters
, vol.53
, Issue.5
, pp. 249-254
-
-
Davis, R.1
Burns, A.2
-
24
-
-
0026853681
-
Low-power cmos digital design
-
April
-
A. P. Chandrakasan, S. Sheng, and R. W. Brodersen, "Low-power cmos digital design," IEEE Journal of Solid-State Circuits, vol. 27, no. 4, pp. 473-484, April 1992.
-
(1992)
IEEE Journal of Solid-state Circuits
, vol.27
, Issue.4
, pp. 473-484
-
-
Chandrakasan, A.P.1
Sheng, S.2
Brodersen, R.W.3
-
25
-
-
0036917242
-
Combined dynamic voltage scaling and adaptive body biasing for lower power microporcessor under dynamic workloads
-
S. Martin, K. Flautner, T. Mudge, and D. Blaauw, "Combined dynamic voltage scaling and adaptive body biasing for lower power microporcessor under dynamic workloads," ICCAD, 2002.
-
(2002)
ICCAD
-
-
Martin, S.1
Flautner, K.2
Mudge, T.3
Blaauw, D.4
-
26
-
-
0036396948
-
Impact of scaling on the effectiveness of dynamic power reduction schemes
-
D.Duarte, N.Vijaykrishnan, MJ.Irwin, H.-S. Kim, and G.McFarland, "Impact of scaling on the effectiveness of dynamic power reduction schemes," ICCD, 2002.
-
(2002)
ICCD
-
-
Duarte, D.1
Vijaykrishnan, N.2
Irwin, M.J.3
Kim, H.-S.4
McFarland, G.5
-
30
-
-
4544259605
-
Procrastination scheduling in fixed priority real-time systems
-
R. Jejurikar and R. Gupta, "procrastination scheduling in fixed priority real-time systems," LCTES, 2004.
-
(2004)
LCTES
-
-
Jejurikar, R.1
Gupta, R.2
|