Effects of device design on the thermal properties of InP-based HBTs

IEEE International Symposium on Compound Semiconductors, Proceedings

Volumn 2003-January, Issue , 2003, Pages 205-206

  Li, J C ^a   Asbeck, P M ^a   Sokolich, M ^b   Hussain, T ^b   Hitko, D ^b   Fields, C ^b  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b Hughes Aircraft Co   (United States)

Author keywords

Current density; Dielectric substrates; Electric resistance; Heterojunction bipolar transistors; Indium gallium arsenide; Indium phosphide; Modeling; Temperature; Thermal management; Thermal resistance

Indexed keywords

CURRENT DENSITY; ELECTRIC RESISTANCE; GALLIUM ALLOYS; GALLIUM ARSENIDE; GALLIUM PHOSPHIDE; HEAT RESISTANCE; HETEROJUNCTIONS; INDIUM; INDIUM PHOSPHIDE; MODELS; TEMPERATURE; TEMPERATURE CONTROL; TRANSISTORS;

3D SIMULATIONS; DEVICE DESIGN; DIELECTRIC SUBSTRATES; INDIUM GALLIUM ARSENIDE; INP;

HETEROJUNCTION BIPOLAR TRANSISTORS;

EID: 21644458613     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCS.2003.1239977     Document Type: Conference Paper

References (2)

1. T InGaAs/InAlAs HBTs, Indium Phosphide and Related Materials Conference, 2002, pp.79-82.
2. S. Thomas III et al, "Effects of device design on InP-based HBT thermal resistance", IEEE Transactions On Device and Materials Reliability, Vol. 1, Issue 4, pp. 185-189.