A comprehensive trapped charge profiling technique for SONOS flash EEPROMs

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2004, Pages 403-406

  Nair, Pradeep R ^a   Kumar, P Bharath ^a   Sharma, Ravinder ^a   Kamohara, S ^b   Mahapatra, S ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY BOMBAY   (India)

^b RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CARRIER CONCENTRATION; COMPUTER PROGRAMMING; COMPUTER SIMULATION; EMBEDDED SYSTEMS; FLASH MEMORY; MEASUREMENT THEORY; MONTE CARLO METHODS; SENSITIVITY ANALYSIS; THRESHOLD VOLTAGE; INTELLIGENT SYSTEMS;

BAND-BAND TUNNELING (BBT); CHANNEL HOT ELECTRON (CHE); CHARGE PROFILING; EEPROM CELLS; GATE INDUCED DRAIN LEAKAGE (GIDL) CURRENT; SONOS DEVICES;

PROM; MONTE CARLO METHODS;

CELL-BE; CELL/B.E; CELL/BE; CHARGE PROFILES; CHARGE PROFILING; FLASH CELL; FLASH EEPROMS; I-V MEASUREMENTS; MONTE CARLO'S SIMULATION; TRAPPED CHARGE;

EID: 21644456809     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

1. B. Eitan et al., in proc., Solid State Dev. Mat., p. 522, 1999.
2. B. Eitan et al., IEEE Electron Device Lett., p.543, 2000.
3. E. J. Prinz et al., in proc., IEEE NVSM Workshop, p. 56, 2003.
4. G. Xue et al., in proc., IEEE NVSM Workshop, p. 62, 2003.
5. T. Y. Chan, K. K. Young, and C. Hu, IEEE Electron Device Lett., p. 93, 1987.
6. E. Lusky et al., IEEE Trans. Electron Devices, p. 444, 2004.
7. M. Rosmuelen, I. Crupi, J. Van Houdt, and K. De Meyer, in proc., IEEE NVSM Workshop, p. 81, 2003.
8. ISE TCAD Release 8.0, Integrated Systems Engineering AG, Zürich.
9. J. D. Bude, M. R. Pinto, and R. K. Smith, IEEE Trans. Electron Devices, p. 1873, 2000.
10. S. Mahapatra, et al., Solid-State Electronics, p. 915, 1999.
11. W. K. Chim, S. E. Leang, and D. S. H. Chan, J. Appl. Phys, p. 1992, 1997.