Oxide field dependence of interface trap generation during negative BIAS temperature instability in PMOS

IEEE International Integrated Reliability Workshop Final Report

Volumn , Issue , 2004, Pages 109-112

  Denais, M ^a,b   Huard, V ^c   Parthasarathy, C ^a,b   Ribes, G ^a   Perrier, F ^c   Revil, N ^a   Bravaix, A ^b  

^a STMICROELECTRONICS   (France)

^b NXP SEMICONDUCTORS   (Netherlands)

^c NONE

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC CHARGE; ELECTRON TRAPS; ELECTRON TUNNELING; INTEGRATED CIRCUITS; INTERFACES (MATERIALS); LEAKAGE CURRENTS; NITROGEN OXIDES; OPTIMIZATION; THRESHOLD VOLTAGE;

CHARGE PUMPING (CP); INTERFACE TRAPS; NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI); OXIDE FIELD DEPENDENCE;

MOSFET DEVICES;

EID: 21644452713     PISSN: 19308841     EISSN: 23748036     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. "NBTI challenges in PMOSFETs of advanced CMOS technologies", G. La Rosa, IEEE International Reliability Physics Symposium, Tutorial, 2003.
2. "Hole trapping effect on methodology for DC and AC Negative Bias Temperature Instability Measurements in PMOS transistors", V. Huard, M. Denais, IEEE International Reliability Physics Symposium Proceedings, p. 40, 2004.
3. "A reliable Approach to Charge-Pumping Measurements in MOS transistors", G. Groeseneken, H. E. Maes, N. Beltran, R. F. De Keersmaecker, IEEE Transactions on Electron Devices, Vol. 31, p.42, 1984.
4. "Interface traps and oxide traps creation under NBTI and PBTI in advanced CMOS technology with a 2nm gate-oxide" M. Denais, V. Huard, C. Parthasarathy, G. Ribes, F. Perrier, N. Revil, A. Bravaix, IEEE Integrated Reliability Workshop proceedings, p. 1, 2003
5. "A thorough investigation of pMOSFETs NBTI degradation", V. Huard, M. Denais, F. Perrier, N. Revil, C. Parthasarathy, A. Bravaix, E. Vincent, Invited Paper, Special Issue (NBTI) of Microelectronic Reliability Journal, to be published 2004.
6. "Negative Bias Temperature Instability on Three Oxide Thicknesses (1.4/2.2/5.2nm) with Nitridation Variations and Deuteration", T. B. Hook, R. Bolam, W. Clark, J. Burnham, N. Rovedo, L. Schutz, Special Issue (NBTI) of Microelectronic Reliability Journal, to be published 2004.
7. "Characterization of interface defects related to negative-bias temperature instability in ultrathin plasma-nitrided SiON/Si(100) systems", S. Fujieda, Y. Miura, M. Saitoh, Y. Teraoka, and A. Yoshigoe. Special Issue (NBTI) of Microelectronic Reliability Journal, to be published 2004.
8. "Mechanism of nitrogen-enhanced negative bias temperature instability in pMOSFET", S. S. Tan, T. P. Chen, C.H. Ang, L.Chan, Special Issue (NBTI) of Microelectronic Reliability Journal, to be published 2004.