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Volumn , Issue , 2004, Pages 647-650

Rail-to-rail differential linear range OTA with pico-A/V transconductance for subHertz OTA-C filter

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CAPACITANCE; CAPACITORS; CMOS INTEGRATED CIRCUITS; DIODES; ELECTROSTATICS; GATES (TRANSISTOR); MOSFET DEVICES; SIGNAL PROCESSING; THRESHOLD VOLTAGE; TRANSCONDUCTANCE;

EID: 21644452447     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (5)

References (6)
  • 2
    • 0742286335 scopus 로고    scopus 로고
    • A 1-V Micropower Log-Domain integrator based on FGMOS transistors operating in weak inversion
    • January
    • E. Rodriguez-Villegas, A. Yufera, and A. Rueda " A 1-V Micropower Log-Domain integrator based on FGMOS transistors operating in weak inversion, "IEEE Journal of solid-State Circuits, Vol.39.No. 1, January 2004.
    • (2004) IEEE Journal of Solid-state Circuits , vol.39 , Issue.1
    • Rodriguez-Villegas, E.1    Yufera, A.2    Rueda, A.3
  • 3
    • 0030700942 scopus 로고    scopus 로고
    • Modeling multiple-input floating-gate transistors for analog signal Processing
    • J.Ramírez-Angulo, G. Gonzalez-Altamirano, and S.C. Choi, " Modeling multiple-input floating-gate transistors for analog signal Processing," ISCAS'97, vol. 3, pp. 2020-2023, 1997.
    • (1997) ISCAS'97 , vol.3 , pp. 2020-2023
    • Ramírez-Angulo, J.1    Gonzalez-Altamirano, G.2    Choi, S.C.3
  • 5
    • 0028436831 scopus 로고
    • Systematic capacitance matching errors and corrective layout procedures
    • M. J. McNutt, S. LeMarquis, and J. L. Dunkley, "Systematic Capacitance Matching Errors and Corrective Layout Procedures," IEEE Journal of Solid-State Circuits, vol. 29, no. 5 pp. 611-616, 1994.
    • (1994) IEEE Journal of Solid-state Circuits , vol.29 , Issue.5 , pp. 611-616
    • McNutt, M.J.1    Lemarquis, S.2    Dunkley, J.L.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.