A generic CAD tool for efficient NoC design

Proceedings of 2004 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2004

Volumn , Issue , 2004, Pages 728-733

  Evain, Samuel ^a,b   Diguet, Jean Philippe ^a   Houzet, Dominique ^b  

^a UNIVERSITÉ DE BRETAGNE SUD   (France)

^b UNIVERSITÉ DE RENNES 1   (France)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED SOFTWARE ENGINEERING; COMPUTER SIMULATION; FIELD PROGRAMMABLE GATE ARRAYS; FLOW CONTROL; INTERFACES (COMPUTER); MICROPROCESSOR CHIPS; PACKET SWITCHING; QUALITY OF SERVICE; ROUTERS; TELECOMMUNICATION TRAFFIC;

BEST EFFORT (BE) SERVICES; GUARANTEED THROUGHPUT (GT); NETWORK ON CHIP (NOC); SYSTEM ON CHIP (SOC);

COMPUTER AIDED DESIGN;

EID: 21444461614     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

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