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Volumn 1071, Issue , 1996, Pages 261-277
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A timing refinement of intuitionistic proofs and its application to the timing analysis of combinational circuits
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Author keywords
[No Author keywords available]
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Indexed keywords
COMBINATORIAL CIRCUITS;
COMPUTER CIRCUITS;
FORMAL LOGIC;
INTEGRATED CIRCUITS;
LOGIC CIRCUITS;
RECONFIGURABLE HARDWARE;
SEMANTICS;
STABILIZATION;
THEOREM PROVING;
EXPERIMENTAL PROTOTYPE;
HARDWARE VERIFICATION;
INTENSIONAL SEMANTICS;
INTUITIONISTIC LOGIC;
INTUITIONISTIC PROOFS;
INTUITIONISTIC PROPOSITIONAL LOGIC;
TEMPORAL OPERATORS;
TIMING INFORMATION;
TIMING CIRCUITS;
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EID: 21344433632
PISSN: 03029743
EISSN: 16113349
Source Type: Book Series
DOI: 10.1007/3-540-61208-4_17 Document Type: Conference Paper |
Times cited : (5)
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References (16)
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