New test paradigms for yield and manufacturability

IEEE Design and Test of Computers

Volumn 22, Issue 3, 2005, Pages 240-246

  Madge, Robert ^a  

^a AGERE SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; CRYSTAL DEFECTS; FAILURE ANALYSIS; NANOTECHNOLOGY; OPTIMIZATION; STATISTICAL TESTS;

PARAMETRIC YIELD; RANDOM YIELD; SYSTEMATIC YIELD;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 21244492003     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2005.67     Document Type: Article

References (0)