Infrastructure for successful BEOL yield amp, transfer to manufacturing, and DFM characterization at 65 nm and below

IEEE Design and Test of Computers

Volumn 22, Issue 3, 2005, Pages 232-239

  Yeric, Greg ^a   Cohen, Ethan ^a   Garcia, John ^a   Davis, Kurt ^a   Saleta, Esam ^a   Green, Gary ^a  

^a HPL Technologies Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CRYSTAL DEFECTS; FAILURE ANALYSIS; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR DEVICE TESTING;

BACK-END-OF-LINE (BEOL) YIELD; DESIGN-FOR-MANUFACTURABILITY (DFM);

SEMICONDUCTOR DEVICE MANUFACTURE;

EID: 21244431635     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/MDT.2005.63     Document Type: Article

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