Blue Gene/L compute chip: Control, test, and bring-up infrastructure

IBM Journal of Research and Development

Volumn 49, Issue 2-3, 2005, Pages 289-301

  Haring, Ruud A ^a   Bellofatto, Ralph ^a   Bright, Arthur A ^a   Crumley, Paul G ^a   Dombrowa, Marc Boris ^a   Douskey, Steven M ^b   Ellavsky, Matthew R ^b   Gopalsamy, Balaji ^c   Hoenicke, Dirk ^a   Liebsch, Thomas A ^b   Marcella, James A ^b   Ohmacht, Martin ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b IBM   (United States)

^c IBM INDIA RESEARCH LAB   (India)

Author keywords

[No Author keywords available]

Indexed keywords

BUILT-IN SELF TEST; COMPUTER DEBUGGING; CONTROL EQUIPMENT; EMBEDDED SYSTEMS; INTERFACES (COMPUTER); LOGIC CIRCUITS; PARALLEL PROCESSING SYSTEMS; SERVERS; STATIC RANDOM ACCESS STORAGE; SUPERCOMPUTERS;

ACCESS MACRO; CLOCK TREE; DEVICE CONTROL REGISTER; LOGIC BUILT-IN SELF TEST;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 21044452860     PISSN: 00188646     EISSN: None     Source Type: Journal    
DOI: 10.1147/rd.492.0289     Document Type: Article

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