Multiprocessor DSP scheduling in system-on-a-chip architectures

Proceedings - Euromicro Conference on Real-Time Systems

Volumn , Issue , 2002, Pages 231-238

  Gai, P ^a   Abeni, L ^a   Buttazzo, G ^b  

^a SCUOLA SUPERIORE SANT ANNA   (Italy)

^b UNIVERSITY OF PAVIA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL REQUIREMENTS; COMPUTATIONAL RESOURCES; DEDICATED PROCESSORS; EMBEDDED APPLICATION; MICROCONTROLLER ARCHITECTURE; MULTI PROCESSOR SCHEDULING; SCHEDULABILITY; SYSTEM-ON-A-CHIP ARCHITECTURES;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; EMBEDDED SYSTEMS; MICROPROCESSOR CHIPS; REAL TIME SYSTEMS;

COMPUTER ARCHITECTURE;

EID: 20844452299     PISSN: 10683070     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EMRTS.2002.1019203     Document Type: Conference Paper

References (14)

1. N. Audsley, A. Burns, M. Richardson, K. Tindell, and A. Wellings. Applying new scheduling theory to static priority preemptive scheduling. Software Engineering Journal, 8(8):284-292, Sep 1993.
2. T. Baker. Stack-based scheduling of real-time processes. Journal of Real-Time Systems, 3, 1991.
3. T. P. Baker. A stack-based allocation policy for realtime processes. In IEEE Real-Time Systems Symposium, december 1990.
4. R. Baumgartl and H. Hartig. Dsps as flexible multimedia accelerators. In Second European DSP Education and Research Conference (EDRC'98), Paris, September 1998.
5. E. Bini, G. Buttazzo, and G. Buttazzo. A hyperbolic bound for the rate monotonic algorithm. In Proceedings of the 13th IEEE Euromicro Conference on Real-Time Systems, June 2001.
6. A. Ferrari, S. Garue, M. Peri, S. Pezzini, L.Valsecchi, F. Andretta, and W. Nesci. The design and implementation of a dual-core platform for power-train systems. In Convergence 2000, Detroit (MI), USA, October 2000.
7. T. Instruments. Military Semiconductor Products Fact Sheet SM320C80 / SMJ320C80 / 5962-9679101 SGYV006C, August 2000.
8. J. Lehoczky, L. Sha, and Y. Ding. The rate monotonic scheduling algorithm: Exact characterization and average case behavior. In Proceedings of the IEEE Real-Time Systems Symposium, December 1989.
9. R. Rajkumar. Synchronization in multiple processor systems. In Synchronization in Real-Time Systems: A Priority Inheritance Approach. Kluwer Academic Publishers, 1991.
10. R. Rajkumar, L. Sha, and J. P. Lehoczky. Real-time synchronization protocols for multiprocessors. In In Proceedings of the 1988 Real Time System Symposium, 1988.
11. K. K. P. Research. Increasing functionality in set-top boxes. In Proceedings of IIC-Korea, Seoul, 2001.
12. S. Saewong and R. R. Rajkumar. Cooperative scheduling of multiple resources. In Proceedings of the IEEE Real-Time Systems Symposium, December 1999.
13. L. Sha, R. Rajkumar, and J. P. Lehoczky. Priority inheritance protocols: An approach to real-time synchronization. IEEE transaction on computers, 39(9), September 1990.
14. K. Tindell. An extendible approach for analysing fixed priority hard real-time tasks. Technical Report YCS 189, Department of Computer Science, University of York, December 1992.