Placement and routing for non-rectangular embedded programmable logic cores in SoC design

Proceedings - 2004 IEEE International Conference on Field-Programmable Technology, FPT '04

Volumn , Issue , 2004, Pages 65-72

  Wong, Tony ^a   Wilton, Steven J E ^a  

^a UNIVERSITY OF BRITISH COLUMBIA   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CONFORMAL MAPPING; DATA STORAGE EQUIPMENT; EMBEDDED SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS; INTEGRATED CIRCUIT LAYOUT; INTELLECTUAL PROPERTY; LOGIC DEVICES; MICROPROCESSOR CHIPS; OPTIMIZATION;

EMBEDDED PROGRAMMABLE LOGIC CORES (EPLC); LOGIC ELEMENTS; ROUTING ALGORITHMS; SYSTEM-ON-A CHIP (SOC) DESIGN;

PROGRAMMABLE LOGIC CONTROLLERS;

EID: 20844440506     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)

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