Built-in self-test for phase-locked loops

IEEE Transactions on Instrumentation and Measurement

Volumn 54, Issue 3, 2005, Pages 996-1002

  Hsu, Chun Lung ^a   Lai, Yiting ^a   Wang, Shu Wei ^a  

^a NATIONAL DONG HWA UNIVERSITY   (Taiwan)

Author keywords

Area overhead; Built in self test (BIST); Fault coverage; Phase locked loop (PLL); Testing

Indexed keywords

BUILT-IN SELF TEST; COMPUTER SIMULATION; DIGITAL INTEGRATED CIRCUITS; INTEGRATED CIRCUIT TESTING; MATHEMATICAL MODELS; MULTIPLYING CIRCUITS; VARIABLE FREQUENCY OSCILLATORS; VOLTAGE MEASUREMENT;

ANALOG CIRCUITS; AREA OVERHEAD; FAULT COVERAGE; MULTIPLEXERS;

PHASE LOCKED LOOPS;

EID: 20544476732     PISSN: 00189456     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIM.2005.847343     Document Type: Article

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