A discontinuous carrier-based multilevel modulation for multilevel converters

IECON Proceedings (Industrial Electronics Conference)

Volumn 1, Issue , 2004, Pages 280-285

  Cecati, Carlo ^a   Dell'Aquila, Antonio ^b   Lecci, Agostino ^b   Liserre, Marco ^b   Monopoli, Vito G ^b  

^a UNIVERSITY OF L'AQUILA   (Italy)

^b POLITECNICO DI BARI   (Italy)

Author keywords

FPGA; H bridge; Multilevel converter; PWM technique

Indexed keywords

AC CURRENTS; H-BRIDGES; MULTILEVEL CONVERTERS; PWM TECHNIQUES;

ELECTRIC RESISTANCE; FIELD PROGRAMMABLE GATE ARRAYS; INDUCTANCE; MICROCONTROLLERS; MODULATORS; PHASE SHIFT; PULSE WIDTH MODULATION; SWITCHING;

ELECTRIC CONVERTERS;

EID: 20544433910     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IECON.2004.1433323     Document Type: Conference Paper

References (13)

1. K. Corzine, Y. Familiant, A New Cascaded Multilevel H-Bridge Drive, IEEE Trans. Pow. Electron., Vol. 17, No. 1, Jan. 2002. pp. 125-131.
2. H. Ertl, J.W. Kolar, F.C. Zach, Analysis of a Multilevel Multicell Switch-Mode Power Amplifier Employing the Flying-Battery Concept, IEE Trans. Ind. Electron., Vol. 49, No. 4, Aug. 2002. pp. 816-823.
3. C. Cecati, A. Dell'Aquila, M. Liserre and V. G. Monopoli, A passivity-based multilevel active rectifier with adaptive compensation for traction applications, IEEE Trans., Ind. Applicat., vol. 39, Sept./Oct. 2003, pp. 1404-1413.
4. C. Cecati, A. Dell'Aquila, M. Liserre and V. G. Monopoli, Design of H-bridge Multilevel Active Rectifier for Traction Systems, IEEE-Transactions on Industry Applications, vol. 39, No. 5, Sept-Oct. 2003, pp. 1541-1550.
5. D. G. Holmes, T. A. Lipo, Pulse Width Modulation for Power Converters Principles and Practice, IEEE Press, 2003.
6. Y. Tzou, H. Hsu, "FPGA Realization of Space-Vector PWM Control IC for Three-Phase PWM Inverters", IEEE Trans., Power Electronics, vol. 12, Nov. 1997, pp. 953-963.
7. C. Cecati, M. Cirstea, M. Mc. Cormick, P. Fioravanti, Design of a FPGA Implementing a Passivity-based Pulsewidth Modulation, SPEEDAM 2002, 11-14 Giugno 2002, Ravello, Italia, pp. A2_43-A2_48.
8. D. Hasenkopf, E. Weigand, J. Xie, "FPGA-based modulator design for five-level inverter control with optimized pulse patterns", Proc. of IEEE-ISIE 2002, Jut 8-11, pp. 772-777.
9. S. Berto, S. Bolognani, M. Cerchia, A. Paccagnella, M. Zigliotto, FPGA-Based Random PWM with Real-Time Dead Time Compensation, Proc. of IEE PESC'03, pp. 513-518.
10. N. Mohan, T. M. Undeland, W. P. Robbins, Power Electronics Converters, Applications and Design, John Wiley & Sons, 2003, ISBN 0471429082.
11. Renesas SH7040 Hardware Manual.
12. ProASIC Plus Flash Family FPGA, Actel Corporation, Mountain View, CA, USA, available: http://www.actel.com\documents\paplusprodbrief.pdf.
13. C. Cecati, A. Dell'Aquila, A. Lecci, M. Liserre and V. G. Monopoli, FPGA-based Multilevel PWM for Multilevel Converters, Proc. of IEEE ISIE'04.