Template guided self-assembling two-dimensional array of Au@SiO 2 core-shell nanoparticles for room-temperature single electron transistors

Journal of Nanoscience and Nanotechnology

Volumn 5, Issue 2, 2005, Pages 173-183

  Yang, Yong ^a   Nogami, Masayuki ^a   Shi, Jianlin ^b   Ruan, Meiling ^b  

^a NAGOYA INSTITUTE OF TECHNOLOGY   (Japan)

^b SHANGHAI INSTITUTE OF CERAMICS   (China)

Author keywords

AFM Nanolithography; Coulomb Staircase; Self Assembly; Single Electron Tunneling; Two Dimensional Array

Indexed keywords

AFM NANOLITHOGRAPHY; COULOMB STAIRCASE; SINGLE ELECTRON TUNNELING; TWO DIMENSIONAL ARRAY;

ATOMIC FORCE MICROSCOPY; CURRENT VOLTAGE CHARACTERISTICS; ELECTRON TUNNELING; GOLD; NANOTECHNOLOGY; SELF ASSEMBLY; SILICA; SYNTHESIS (CHEMICAL);

NANOSTRUCTURED MATERIALS;

GOLD; NANOMATERIAL; SILICON DIOXIDE;

ARTICLE; ATOMIC FORCE MICROSCOPY; CHEMISTRY; COLLOID; ELECTRON; METHODOLOGY; NANOTECHNOLOGY; PARTICLE SIZE; SEMICONDUCTOR; SURFACE PROPERTY; TEMPERATURE; TRANSMISSION ELECTRON MICROSCOPY; ULTRASTRUCTURE;

COLLOIDS; ELECTRONS; GOLD; MICROSCOPY, ATOMIC FORCE; MICROSCOPY, ELECTRON, TRANSMISSION; NANOSTRUCTURES; NANOTECHNOLOGY; PARTICLE SIZE; SILICON DIOXIDE; SURFACE PROPERTIES; TEMPERATURE; TRANSISTORS;

EID: 20544433010     PISSN: 15334880     EISSN: None     Source Type: Journal    
DOI: 10.1166/jnn.2005.041     Document Type: Article

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