Quantum Boolean circuits construction using tabulation method

2004 4th IEEE Conference on Nanotechnology

Volumn , Issue , 2004, Pages 596-598

  Lu, Chin Yung ^a   Wang, Shiou An ^a   Kuo, Sy Yen ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

Logic minimization; Quantum Boolean circuit; Tabulation method

Indexed keywords

ALGORITHMS; BOOLEAN FUNCTIONS; CALCULATIONS; COMPUTER SCIENCE; LOGIC GATES; QUANTUM THEORY;

LOGIC FUNCTIONS; LOGIC MINIMIZATION; QUANTUM BOOLEAN CIRCUITS; TABULATION METHOD;

NETWORKS (CIRCUITS);

EID: 20344405501     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. P. Shor, "Algorithms for quantum computation: discrete logarithms and factoring" Proc. of the 35th Annual IEEE Symposium on the Foundations of Computer Science, pp. 124-134, 1994.
2. L. Grover, "A fast quantum mechanical algorithm for database search" Proc. of the 28th Annual ACM symposium on the Theory of Computing, pp. 212-219, 1996.
3. I-Ming Tsai and Sy-Yen Kuo, "Quantum Boolean Circuit Construction and Layout under Locality Constraint" Proc. of the 1st IEEE Conference on Nanotechnology, pp. 111-116, 2001.
4. Charles H. Roth, Jr, Fundamentals of Logic Design 3rd ed. St. Paul: West Pub. Co. 1985.