Using multi-bit logic blocks and automated packing to improve field-programmable gate array density for implementing datapath circuits

Proceedings - 2004 IEEE International Conference on Field-Programmable Technology, FPT '04

Volumn , Issue , 2004, Pages 129-136

  Ye, Andy G ^a   Rose, Jonathan ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARK CIRCUITS; DATAPATH CIRCUITS; LOGIC BLOCKS; PACKING ALGORITHMS;

ALGORITHMS; COMPUTER AIDED DESIGN; COMPUTER GRAPHICS; COMPUTER PROGRAMMING; DIGITAL ARITHMETIC; INTERNET; MULTIMEDIA SYSTEMS; SIGNAL PROCESSING;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 20344381483     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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