Dynamic reconfiguration in FPGA-based SoC designs

ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA

Volumn , Issue , 2005, Pages 274-

  Bartosinski, Roman ^a   Daněk, Martin ^a   Honzik, Petr ^a   Matoušek, Rudolf ^a  

^a INSTITUTE OF MATHEMATICS   (Czech Republic)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATION THEORY; COMPUTER HARDWARE; ENERGY UTILIZATION; LOGIC DESIGN; MICROPROCESSOR CHIPS; NATURAL FREQUENCIES;

OPERATING FREQUENCY; RECONFIGURATION; SYSTEM ON CHIP (SOC) DESIGNS; USER CODES;

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 20344368349     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)