Demonstration of threshold voltage control techniques for vertical-type 4-terminal double-gate MOSFETs (4T-DGFET)

ESSCIRC 2004 - Proceedings of the 34th European Solid-State Device Research Conference

Volumn , Issue , 2004, Pages 73-76

  Masahara, Meishoku ^a   Liu, Yongxun ^a   Sekigawa, Toshihiro ^a   Hosokawa, Shinichi ^a   Ishii, Kenichi ^a   Matsukawa, Takashi ^a   Tanoue, Hisao ^a   Sakamoto, Kunihiro ^a   Yamauchi, Hiromi ^a   Kanemaru, Seigo ^a   Koike, Hanpei ^a   Suzuki, Eiichi ^a  

^a NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY AIST   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; CONTROL SYSTEM ANALYSIS; DOPING (ADDITIVES); FABRICATION; GATES (TRANSISTOR); MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; SWITCHING; THRESHOLD VOLTAGE;

DOUBLE-DRIVE (DD) MODES; FOUR-TERMINAL DOUBLE-GATE MOSFET (4T-DGFET); GATE OXIDATIONS; THRESHOLD VOLTAGE CONTROL TECHNIQUES;

MOSFET DEVICES;

EID: 20244381830     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)

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