Optimal lot-sizing policy with incentives for yield improvement

IEEE Transactions on Semiconductor Manufacturing

Volumn 18, Issue 2, 2005, Pages 304-308

  Gurnani, Haresh ^a  

^a UNIVERSITY OF MIAMI   (United States)

Author keywords

Incentives; Lot sizing; Policy; Random yield

Indexed keywords

INDUSTRIAL MANAGEMENT; MANAGERS; MICROPROCESSOR CHIPS; OUTSOURCING; PRODUCTION ENGINEERING; SEMICONDUCTING SILICON;

INCENTIVES; LOT SIZING; MICROCHIP DESIGNS; RANDOM YIELD;

SEMICONDUCTOR DEVICE MANUFACTURE;

EID: 19544369516     PISSN: 08946507     EISSN: None     Source Type: Journal    
DOI: 10.1109/TSM.2005.845106     Document Type: Conference Paper

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