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Volumn , Issue , 2001, Pages 280-285

Underfill delamination analysis of flip chip on low-cost board

Author keywords

[No Author keywords available]

Indexed keywords

CHIP SCALE PACKAGES; COST BENEFIT ANALYSIS; CRACK TIPS; CRACKS; DELAMINATION; ELECTRONICS PACKAGING; ENERGY RELEASE RATE; FINITE ELEMENT METHOD; FLIP CHIP DEVICES; FRACTURE; MODIFIED ATMOSPHERE PACKAGING; STRAIN ENERGY; STRAIN RATE;

EID: 1942492714     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EMAP.2001.983998     Document Type: Conference Paper
Times cited : (9)

References (18)
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  • 3
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  • 10
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  • 12
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.