An overhead reducing technique for Time Warp

Proceedings - IEEE International Symposium on Distributed Simulation and Real-Time Applications, DS-RT

Volumn 2002-January, Issue , 2002, Pages 95-102

  Chung, Moon Jung ^a   Xu, Jinsheng ^a  

^a Michigan State University   (United States)

Author keywords

Circuit simulation; Computational modeling; Computer science; Costs; Discrete event simulation; Discrete event systems; Hardware; Integrated circuit interconnections; Moon; Time warp simulation

Indexed keywords

CIRCUIT SIMULATION; COMPUTER HARDWARE; COMPUTER SCIENCE; COSTS; DISTRIBUTED COMPUTER SYSTEMS; HARDWARE; INTEGRATED CIRCUIT INTERCONNECTS; MOON;

COMPUTATIONAL MODEL; HARDWARE SIMULATION; INTEGRATED CIRCUIT INTERCONNECTIONS; MEMORY SIZE; NETWORK SIMULATION; NUMBER OF STATE; STATE SAVING; TIME WARP;

DISCRETE EVENT SIMULATION;

EID: 18644372940     PISSN: 15506525     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DISRTA.2002.1166894     Document Type: Conference Paper

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