Area efficient GF(p) architectures for GF(pm) multipliers

Midwest Symposium on Circuits and Systems

Volumn 2, Issue , 2002, Pages

  Guajardo, Jorge ^a   Wollinger, Thomas ^a   Paar, Christof ^a  

^a RUHR UNIVERSITY BOCHUM   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; COMPUTATIONAL COMPLEXITY; LOGIC DESIGN; SEQUENTIAL CIRCUITS;

OPTIMAL EXTENSION FIELDS (OEF);

MULTIPLYING CIRCUITS;

EID: 18544405923     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

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