Memory hierarchy optimizations and performance bounds for sparse ATAx

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2659, Issue , 2003, Pages 705-714

  Vuduc, Richard ^a   Gyulassy, Attila ^a   Demmel, James W ^a   Yelick, Katherine A ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; MEMORY ARCHITECTURE;

AUTOMATIC TUNING TECHNIQUES; COMPUTATIONAL KERNELS; EXPERIMENTAL ANALYSIS; INSTRUCTION SCHEDULING; MEMORY HIERARCHY OPTIMIZATIONS; PERFORMANCE BOUNDS; PERFORMANCE OPTIMIZATIONS; SPARSE MATRIX-VECTOR MULTIPLY;

OPTIMIZATION;

EID: 1842843479     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-44863-2_69     Document Type: Article

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