Effect of technology scaling on the 1/f noise of deep submicron PMOS transistors

Solid-State Electronics

Volumn 48, Issue 7, 2004, Pages 1101-1109

  Chew, K W ^a,b,c   Yeo, K S ^b   Chu, S F ^a  

^a Chartd Semiconduct Mfg Ltd   (Singapore)

^b NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^c NONE   (Singapore)

Author keywords

1 f noise; BSIM3v3 flicker noise model; Nitridation; Technology scaling; Thick gate oxide; Thin gate oxide

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; ELECTROCHEMICAL ELECTRODES; GATES (TRANSISTOR); HOT CARRIERS; MATHEMATICAL MODELS; MOSFET DEVICES; SIGNAL RECEIVERS; SIGNAL TO NOISE RATIO; SPURIOUS SIGNAL NOISE; TRANSCEIVERS;

1/F NOISE; BSIM3V3 FLICKER NOISE MODELS; NITRIDATION; TECHNOLOGY SCALING; THICK GATE OXIDES; THIN GATE OXIDES;

MOS DEVICES;

EID: 1842832730     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.sse.2004.02.009     Document Type: Article

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