Early analysis of chip scale package design trade-offs

Proceedings - 1998 IEEE Symposium on IC/Package Design Integration, IPDI 1998

Volumn 1998-February, Issue , 1998, Pages 64-69

  Blood, William ^a   Lai, Alex ^a  

^a MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP SCALE PACKAGES; COMMERCE; COMPUTER AIDED DESIGN; COSTS; ECONOMIC AND SOCIAL EFFECTS; INTEGRATED CIRCUIT INTERCONNECTS;

COMPONENT LEVELS; DEVELOPMENT CYCLE; PACKAGE DESIGNERS; PACKAGE TECHNOLOGIES; PHYSICAL DESIGN; POTENTIAL CUSTOMERS; PRODUCT-DESIGN CYCLES; TECHNICAL INFORMATION;

INTEGRATED CIRCUIT DESIGN;

EID: 1842683309     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDI.1998.663623     Document Type: Conference Paper

References (2)

1. C. Koehler, T. Tessier, J. Aday, et al., ÒA User-Focused Chip Scale Packaging SolutionÓ, Proceedings of the Second International Conference on Chip Scale Packaging, 1997, pp. 159-166.
2. K. R. Thompson, K. Banerji, W. B. Mullen III, ÒIntegrated Circuit Chip Carrier,Ó patent 5,293,067, Mar 1994.