Reliable and efficient system-on-chip design

Computer

Volumn 37, Issue 3, 2004, Pages 42-50

  Shanbhag, Naresh R ^a  

^a United States of America   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIT ERROR RATE; DATA COMMUNICATION SYSTEMS; DEMODULATORS; ELECTRIC POTENTIAL; ELECTRONICS PACKAGING; ENERGY EFFICIENCY; LEAKAGE CURRENTS; LOGIC GATES; POWER AMPLIFIERS; PROBABILITY; THRESHOLD VOLTAGE; TRANSCONDUCTANCE;

ELECTRONIC DESIGN AUTOMATION; GAUSSIAN DISTRIBUTION; INFORMATION TRANSFER CAPACITY; SYSTEM-ON-CHIP DESIGN;

SYSTEMS ANALYSIS;

EID: 1842582494     PISSN: 00189162     EISSN: None     Source Type: Trade Journal    
DOI: 10.1109/MC.2004.1274003     Document Type: Article

References (14)

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