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Volumn 5256, Issue 2, 2003, Pages 919-925

Hotspot Detection on Post-OPC Layout Using Full Chip Simulation Based Verification Tool: A Case Study with Aerial Image Simulation

Author keywords

Hotspots; Lithography; Optical Proximity Correction; Post OPC verification

Indexed keywords

CALIBRATION; COMPUTER SIMULATION; COSTS; DATABASE SYSTEMS; ERROR ANALYSIS; IMAGE PROCESSING; MICROPROCESSOR CHIPS; OPTICAL RESOLVING POWER; PHOTOLITHOGRAPHY;

EID: 1842474918     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.517364     Document Type: Conference Paper
Times cited : (51)

References (4)
  • 4
    • 84862350316 scopus 로고    scopus 로고
    • "Proximity Correction System for Wafer Lithography", U.S. Ptent 6,081,658, issued June 27
    • M. L. Rieger, J. P. Stirniman, "Proximity Correction System for Wafer Lithography", U.S. Ptent 6,081,658, issued June 27, 2000
    • (2000)
    • Rieger, M.L.1    Stirniman, J.P.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.