Mixed-signal equalization architectures for printed circuit board channels

ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

Volumn 4, Issue , 2002, Pages

  Hoyos, Sebastian ^a   Garcia, Jorge ^a   Arce, Gonzalo ^a  

^a University of Delaware   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; COMMUNICATION CHANNELS (INFORMATION THEORY); COMPUTER ARCHITECTURE; DATA COMMUNICATION SYSTEMS; DECISION FEEDBACK EQUALIZERS; FREQUENCY RESPONSE; INTERSYMBOL INTERFERENCE; PRINTED CIRCUIT BOARDS; TIME DOMAIN ANALYSIS;

GIGABIT COMMUNICATION; HIGH SPEED DATA TRANSMISSION; MIXED SIGNAL EQUALIZATION; SIGNAL REFLECTION;

SIGNAL PROCESSING;

EID: 18144453283     PISSN: 15206149     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/icassp.2002.5745476     Document Type: Conference Paper

References (3)

1. A 0.4 - μ cmos 10-gb/s 4-pam pre-emphasis serial link transmitter
2. A 0.3 - μ cmos 8-gb/s 4-pam serial link transceiver
3. Mos transconductors and integrators with high linearity