Influence of electrode layout on performance of insulated surface discharge: Modelling by use of PSpice

Surface and Coatings Technology

Volumn 174-175, Issue , 2003, Pages 541-546

  Teschke, M ^a   Korzec, D ^a   Finantu Dinu E G ^a   Engemann, J ^a  

^a UNIVERSITY OF WUPPERTAL   (Germany)

Author keywords

Barrier discharge; Coplanar barrier discharge; PSpice; QUICKFIELD; Simulation; Surface barrier discharge

Indexed keywords

ELECTRIC POTENTIAL; ELECTRODES; NETWORKS (CIRCUITS);

INSULATED SURFACE DISCHARGE (ISD);

SURFACE DISCHARGES;

COATING; INDUSTRIAL APPLICATION; PLASMA; SURFACE PROPERTY;

EID: 18144439274     PISSN: 02578972     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0257-8972(03)00614-5     Document Type: Article

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