Fine-grain abstraction and sequential don't cares for large scale model checking

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 2004, Pages 112-118

  Wang, Chao ^a   Hachtel, Gary D ^a   Somenzi, Fabio ^a  

^a University of Colorado at Boulder   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ABSTRACTION REFINEMENT; COMBINATIONAL LOGIC; PROPOSITIONAL LOGIC; STATE VARIABLES;

ALGORITHMS; BOOLEAN ALGEBRA; COMPUTATIONAL COMPLEXITY; LARGE SCALE SYSTEMS; MATHEMATICAL MODELS; PROBLEM SOLVING; SPECIFICATIONS;

LSI CIRCUITS;

EID: 17644384115     PISSN: 10636404     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (17)

1. R. K. Brayton et al. VIS: A system for verification and synthesis. In T. Henzinger and R. Alur, editors, Eighth Conference on Computer Aided Verification (CAV'96), pages 428-432. Springer-Verlag, Rutgers University, 1996. LNCS 1102.
2. P. Chauhan, E. Clarke, J. Kukula, S. Sapra, H. Veith, and D. Wang. Automated abstraction refinement for model checking large state spaces using SAT based conflict analysis. In M. D. Aagaard and J. W. O'Leary, editors, Formal Methods in Computer Aided Design, pages 33-51. Springer-Verlag, Nov. 2002. LNCS 2517.
3. H. Cho, G. D. Hachtel, E. Macii, B. Plessier, and F. Somenzi. Algorithms for approximate FSM traversal based on state space decomposition. IEEE Transactions on Computer-Aided Design, 15(12):1465-1478, Dec. 1996.
4. E. Clarke, O. Grumberg, S. Jha, Y. Lu, and H. Veith. Counterexample- guided abstraction refinement. In E. A. Emerson and A. P. Sistla, editors, Twelfth Conference on Computer Aided Verification (CAV'00), pages 154-169. Springer-Verlag, Berlin, July 2000. LNCS 1855.
5. E. Clarke, A. Gupta, J. Kukula, and O. Strichman. SAT based abstraction-refinement using ILP and machine learning. In E. Brinksma and K. G. Larsen, editors, Fourteenth Conference on Computer Aided Verification (CAV 2002), pages 265-279. Springer-Verlag, July 2002. LNCS 2404.
6. O. Coudert and J. C. Madre. A unified framework for the formal verification of sequential circuits. In Proceedings of the IEEE International Conference on Computer Aided Design, pages 126-129, Nov. 1990.
7. M. Glusman, G. Kamhi, S. Mador-Haim, R. Fraer, and M. Y. Vardi. Multiple-counterexample guided iterative abstraction refinement: An industrial evaluation. In International Conference on Tools and Algorithms for Construction and Analysis of Systems (TACAS'03), pages 176-191, Warsaw, Poland, Apr. 2003. LNCS 2619.
8. A. Gupta, M. Ganai, Z. Yang, and P. Ashar. Iterative abstraction using SAT-based BMC with proof analysis. In Proceedings of the International Conference on Computer-Aided Design, pages 416-423, Nov. 2003.
9. R. P. Kurshan. Computer-Aided Verification of Coordinating Processes. Princeton University Press, Princeton, NJ, 1994.
10. B. Li, C. Wang, and F. Somenzi. A satisfiability-based approach to abstraction refinement in model checking. Electronic Notes in Theoretical Computer Science, 89(4), 2003. First International Workshop on Bounded Model Checking. http://www.elsevier.nl/locate/entcs/volume89.html.
11. K. L. McMillan and N. Amla. Automatic abstraction without counterexamples. In International Conference on Tools and Algorithms for Construction and Analysis of Systems (TACAS'03), pages 2-17, Warsaw, Poland, Apr. 2003. LNCS 2619.
12. I.-H. Moon, J. Kukula, T. Shiple, and F. Somenzi. Least fix-point MBM: Improved technique for approximate reachability. Presented at IWLS99, Lake Tahoe, CA, June 1999.
13. M. Moskewicz, C. F. Madigan, Y. Zhao, L. Zhang, and S. Malik. Chaff: Engineering an efficient SAT solver. In Proceedings of the Design Automation Conference, pages 530-535, Las Vegas, NV, June 2001.
14. R. K. Ranjan, A. Aziz, R. K. Brayton, B. F. Plessier, and C. Pixley. Efficient BDD algorithms for FSM synthesis and verification. Presented at IWLS95, Lake Tahoe, CA, May 1995.
15. URL: http://vlsi.colorado.edu/~vis.
16. C. Wang, B. Li, H. Jin, G. D. Hachtel, and F. Somenzi. Improving Ariadne's bundle by following multiple threads in abstraction refinement. In Proceedings of the International Conference on Computer-Aided Design, pages 408-415, Nov. 2003.
17. D. Wang, P.-H. Ho, J. Long, J. Kukula, Y. Zhu, T. Ma, and R. Damiano. Formal property verification by abstraction refinement with formal, simulation and hybrid engines. In Proceedings of the Design Automation Conference, pages 35-40, Las Vegas, NV, June 2001.