|
Volumn 3, Issue , 2004, Pages 1689-1694
|
A virtual prototyping process for power supplies using an electronic Design Verification Testing (eDVT) system
|
Author keywords
Electronic Design Verification Test (eDVT); Intellectual Property (IP) Blocks; SIMPLIS; Virtual Prototyping
|
Indexed keywords
ELECTRONIC DESIGN VERIFICATION TEST (EDVT);
INTELLECTUAL PROPERTY (IP) BLOCKS;
SIMPLIS;
VIRTUAL PROTOTYPING;
COMPUTER SIMULATION;
ELECTRIC NETWORK ANALYSIS;
ELECTRONIC EQUIPMENT TESTING;
INTELLECTUAL PROPERTY;
PRODUCT DESIGN;
ELECTRIC POWER SYSTEMS;
|
EID: 17444381562
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (8)
|
References (0)
|