Self-aligned access gate technology for compact embedded flash memories

ESSCIRC 2004 - Proceedings of the 34th European Solid-State Device Research Conference

Volumn , Issue , 2004, Pages 281-284

  Goarin, P ^a   Van Schaijk, R ^a   Slotboom, M ^a   Tello, P G ^a   Van Duuren, M ^a   Akil, N ^a   Baks, W ^a  

^a PHILIPS RESEARCH LABORATORIES   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

CONTROL THEORY; DIELECTRIC MATERIALS; LOGIC GATES; OPTIMIZATION; PARAMETER ESTIMATION; TRANSISTORS; TRANSMISSION ELECTRON MICROSCOPY;

CHANNEL EFFECTS; CONTROL GATES (CG); GATE TECHNOLOGY; INJECTION PROGRAMMING;

DATA STORAGE EQUIPMENT;

EID: 17444372849     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. G. Dormans et al., SSDMD 2001, p540 (2001)
2. M. Slotboom et al., ESSDERC 2003, p159 (2003)
3. M. van Duuren et al., proc. IEEE NVSMW Feb. 2003, Monterey, USA, p73 (2003)
4. Non volatile Semiconductor Memory Technology (ISBN 0-7803-1173-6), ed. W. Brown and J. Brewer, IEEE press, chapter 1.2.4. (1998)