VLSI architecture for forward discrete wavelet transform based on B-spline factorization

Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology

Volumn 40, Issue 3, 2005, Pages 343-353

  Huang, Chao Tsung ^a   Tseng, Po Chih ^a   Chen, Liang Gee ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

B spline factorization; Discrete wavelet transform; VLSI architecture

Indexed keywords

DECOMPOSITION; DIGITAL SIGNAL PROCESSING; FIR FILTERS; IMAGE CODING; IMAGE COMPRESSION; VLSI CIRCUITS;

B-SPLINE FACTORIZATION; DISCRETE WAVELET TRANSFORMS (DWT); MULTIPLIERS; VLSI ARCHITECTURE;

WAVELET TRANSFORMS;

EID: 17444371286     PISSN: 13875485     EISSN: None     Source Type: Journal    
DOI: 10.1007/s11265-005-5269-z     Document Type: Conference Paper

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