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Volumn , Issue , 2004, Pages 206-210
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An efficient reformulation based VLSI architecture for Adaptive viterbi Decoding in wireless applications
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
COMPUTATIONAL COMPLEXITY;
COMPUTER HARDWARE;
DECODING;
FIELD PROGRAMMABLE GATE ARRAYS;
STORAGE ALLOCATION (COMPUTER);
TABLE LOOKUP;
VLSI CIRCUITS;
ADAPTIVE VITERBI DECODING;
ADD COMPARE SELECT (ACS);
HARDWARE COMPLEXITY;
PATH METRIC MEMORY UNIT (PMU);
WIRELESS TELECOMMUNICATION SYSTEMS;
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EID: 17044437058
PISSN: 15206130
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (4)
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References (7)
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