-
2
-
-
0019567795
-
On the performance enhancement of paging systems through program analysis and transformations
-
May
-
Walid Abu-Sufah, David J. Kuck, and Duncan H. Lawrie. On the performance enhancement of paging systems through program analysis and transformations. IEEE Transactions on Computers, C-30(5):341-356, May 1981.
-
(1981)
IEEE Transactions on Computers
, vol.C-30
, Issue.5
, pp. 341-356
-
-
Abu-Sufah, W.1
Kuck, D.J.2
Lawrie, D.H.3
-
3
-
-
0004072686
-
-
Addison-Wesley, Reading, MA
-
A.V. Aho, R. Sethi, and J.D. Ullman. Compilers principles, techniques, and tools. Addison-Wesley, Reading, MA, 1986.
-
(1986)
Compilers Principles, Techniques, and Tools
-
-
Aho, A.V.1
Sethi, R.2
Ullman, J.D.3
-
4
-
-
0028055525
-
Predictability of load/store instruction latencies
-
December
-
S. G. Abraham, R. A. Sugumar, D. Windheiser, B. R. Rau, and R. Gupta. Predictability of load/store instruction latencies. In Proceedings of the 26th Annual ACM/ IEEE International Symposium on Microarchitecture, December 1993.
-
(1993)
Proceedings of the 26th Annual ACM/ IEEE International Symposium on Microarchitecture
-
-
Abraham, S.G.1
Sugumar, R.A.2
Windheiser, D.3
Rau, B.R.4
Gupta, R.5
-
5
-
-
2842568131
-
Internal architecture of Alpha 21164 microprocessor
-
Peter Bannon and Jim Keller. Internal architecture of Alpha 21164 microprocessor. COMPCON 95, 1995.
-
(1995)
COMPCON 95
-
-
Bannon, P.1
Keller, J.2
-
7
-
-
84976722352
-
Software prefetching
-
Santa Clara, April
-
David Callahan, Ken Kennedy, and Allan Porterfield. Software prefetching. In Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, pages 40-52, Santa Clara, April 1991.
-
(1991)
Fourth International Conference on Architectural Support for Programming Languages and Operating Systems
, pp. 40-52
-
-
Callahan, D.1
Kennedy, K.2
Porterfield, A.3
-
9
-
-
84976831704
-
Compiler optimizations for improving data locality
-
San Jose, October
-
Steve Carr, Kathryn S. McKinley, and Chau-Wen Tseng. Compiler optimizations for improving data locality. In Sixth International Conference on Architectural Support for Programming Languages and Operating Systems, pages 252-262, San Jose, October 1994.
-
(1994)
Sixth International Conference on Architectural Support for Programming Languages and Operating Systems
, pp. 252-262
-
-
Carr, S.1
McKinley, K.S.2
Tseng, C.-W.3
-
10
-
-
0029200684
-
Performance evaluation of the PowerPC 620 microarchitecture
-
Santa Margherita Ligure, Italy, June
-
Trung A. Diep, Christopher Nelson, and John P. Shen. Performance evaluation of the PowerPC 620 microarchitecture. In Proceedings of the 22nd International Symposium on Computer Architecture, Santa Margherita Ligure, Italy, June 1995.
-
(1995)
Proceedings of the 22nd International Symposium on Computer Architecture
-
-
Diep, T.A.1
Nelson, C.2
Shen, J.P.3
-
11
-
-
0029535909
-
VMW: A visualizas tion-based microarchitecture workbench
-
Trung A. Diep and John Paul Shen. VMW: A visualizas tion-based microarchitecture workbench. IEEE Computer, 28(12):57-64, 1995.
-
(1995)
IEEE Computer
, vol.28
, Issue.12
, pp. 57-64
-
-
Diep, T.A.1
Shen, J.P.2
-
16
-
-
0025429331
-
Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers
-
Seattle, May
-
Norman P. Jouppi. Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers. In 17th Annual International Symposium on Computer Architecture, pages 364-373, Seattle, May 1990.
-
(1990)
17th Annual International Symposium on Computer Architecture
, pp. 364-373
-
-
Jouppi, N.P.1
-
17
-
-
0043277554
-
-
Technical report, University of Washington
-
David Keppel, Susan J. Eggers, and Robert R. Henry. Evaluating runtime-compiled, value-specific optimizations. Technical report, University of Washington, 1993.
-
(1993)
Evaluating Runtime-compiled, Value-specific Optimizations
-
-
Keppel, D.1
Eggers, S.J.2
Henry, R.R.3
-
18
-
-
0019892368
-
Lockup-free instruction fetch/prefetch cache organization
-
IEEE Computer Society Press
-
David Kroft. Lockup-free instruction fetch/prefetch cache organization. In 8th Annual International Symposium on Computer Architecture, pages 81-87. IEEE Computer Society Press, 1981.
-
(1981)
8th Annual International Symposium on Computer Architecture
, pp. 81-87
-
-
Kroft, D.1
-
19
-
-
3342935940
-
The PowerPC 620 microprocessor: A high performance superscalar RISC processor
-
David Levitan, Thomas Thomas, and Paul Tu. The PowerPC 620 microprocessor: A high performance superscalar RISC processor. COMPCON 95, 1995.
-
(1995)
COMPCON 95
-
-
Levitan, D.1
Thomas, T.2
Tu, P.3
-
21
-
-
0028485474
-
Predicting and precluding problems with memory latency
-
K. Roland and A. Dollas. Predicting and precluding problems with memory latency. IEEE Micro, 14(4):59-67, 1994.
-
(1994)
IEEE Micro
, vol.14
, Issue.4
, pp. 59-67
-
-
Roland, K.1
Dollas, A.2
-
26
-
-
0020177251
-
Cache memories
-
Alan Jay Smith. Cache memories. Computing Surveys, 14(3):473-530, 1982.
-
(1982)
Computing Surveys
, vol.14
, Issue.3
, pp. 473-530
-
-
Smith, A.J.1
-
27
-
-
0028013918
-
Link-time optimization of address calculation on a 64-bit architecture
-
June
-
Amitabh Srivastava and David W. Wall. Link-time optimization of address calculation on a 64-bit architecture. SIGPLAN Notices, 29(6):49-60, June 1994. Proceedings of the ACM SIGPLAN '94 Conference on Programming Language Design and Implementation.
-
(1994)
SIGPLAN Notices
, vol.29
, Issue.6
, pp. 49-60
-
-
Srivastava, A.1
Wall, D.W.2
-
29
-
-
0029508817
-
A modified approach to data cache management
-
December
-
Gary Tyson, Matthew Farrens, John Matthews, and Andrew R. Pleszkun. A modified approach to data cache management. In Proceedings of the 28th Annual ACM/IEEE International Symposium on Microarchitecture, pages 93-103, December 1995.
-
(1995)
Proceedings of the 28th Annual ACM/IEEE International Symposium on Microarchitecture
, pp. 93-103
-
-
Tyson, G.1
Farrens, M.2
Matthews, J.3
Pleszkun, A.R.4
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