23mm2 Single-chip 0.18μm CMOS GPS receiver with 28mW-4.1 mm2 radio and CPU/DSP/RAM/ROM

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2004, Pages 81-84

  Gramegna, G ^a   Franciotta, M ^a   Mandara, V ^a   Bellantone, N G ^a   Vaiana, M ^a   Paparo, M ^a   Losi, M ^a   Das, S ^a   Mattos, P ^b  

^a STMICROELECTRONICS   (Italy)

^b STMicroelectronics Ltd Bristol   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CMOS INTEGRATED CIRCUITS; GLOBAL POSITIONING SYSTEM; RANDOM ACCESS STORAGE; ROM; SIGNAL RECEIVERS; SPURIOUS SIGNAL NOISE;

IMAGE REJECTION; SIGNAL ENERGY; SINGLE CHIPS; TEMPERATURE RANGE;

MICROPROCESSOR CHIPS;

EID: 17044382052     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. F.Behbahani, et at "A 27mW GPS Radio in 0.35um CMOS", ISSCC2002 - International Solid-State Circuits Conference, February 2002, Digest of Technical Papers, pp.398-399.
2. P.Vancorenland et al. "A Fully-Integrated GPS Receiver Front-End with 40mW Power Consumption", ISSCC2002 - International Solid-State Circuits Conference, February 2002, Digest of Technical Papers, pp.396-397.
3. G.Montagna et al., "A 35-mW 3.6-mm2 Fully Integrated 0.1 Sum CMOS GPS Radio", JOURNAL OF SOLID-STATE CIRCUITS, VOL. 38, NO. 7, JULY 2003, pg.1163-1171.
4. T.Kadoyama et al. "A complete Single-Chip GPS Receiver with 1.6-V 24-mW Radio in 0.18-um CMOS", Symposium on VLSI Circuits- 2003 Digest of Technical Papers, pp.135-138.
5. Q.Huang et al., «Speed Optimization of Edge-Triggered CMOS Circuits for Gigahertz Single-Phase Clocks», JOURNAL OF SOLID-STATE CIRCUITS, VOL. 31, NO. 3, March 1996, pg.456-465.
6. P.Mattos et al., "Palinuro: A Single Chip GPS Receiver: RF, DSP, CPU, ROM, RAM All on One Piece of Silicon", submitted to ION GNSS 2004, Sept 21-24 2004, Long Beach CA