A method for storing fail bit maps in burn-in memory testers

Proceedings - 1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002

Volumn , Issue , 2002, Pages 142-145

  Iseno, Atsumu ^a   Iguchi, Yukihiro ^a  

^a MEIJI UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN FOR TESTABILITY;

ANALYZING PROCESS; BURN-IN; DEVICE UNDER TEST; FAIL BIT MAP; FAIL PATTERN;

STATIC RANDOM ACCESS STORAGE;

EID: 1642293718     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DELTA.2002.994603     Document Type: Conference Paper

References (7)

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