Parallel multithreaded satisfiability solver: Design and implementation

Electronic Notes in Theoretical Computer Science

Volumn 128, Issue 3, 2005, Pages 75-90

  Feldman, Yulik ^a   Dershowitz, Nachum ^b   Hanna, Ziyad ^a  

^a INTEL CORPORATION   (Israel)

^b TEL AVIV UNIVERSITY   (Israel)

Author keywords

Satisfiability parallel multithreaded DPLL cache performance

Indexed keywords

MULTITHREADED ALGORITHMS; OPTIMIZATION TECHNIQUES; PROCESSOR CACHE; SATISFIABILITY PARALLEL MULTITHREADED DPLL CACHE PERFORMANCE;

ARTIFICIAL INTELLIGENCE; CACHE MEMORY; COMPUTATIONAL COMPLEXITY; COMPUTER HARDWARE; COMPUTER VISION; OPTIMIZATION; PARALLEL ALGORITHMS; PROBLEM SOLVING;

MULTIPROCESSING SYSTEMS;

EID: 16244393413     PISSN: 15710661     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.entcs.2004.10.020     Document Type: Conference Paper

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