An investigation of ESD protection diode options in SOI

Proceedings - IEEE International SOI Conference

Volumn , Issue , 2004, Pages 24-26

  Putaam, C ^a   Woo, M ^a   Gauthier, R ^a   Muhammad, M ^a   Chatty, K ^a   Seguin, C ^a   Halbach, R ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHARGED DEVICE MODEL (CDM); DEVICE UNDER TEST (DUT); ELECTROSTATIC DISCHARGE (ESD); NON-CONDUCTING DIODES;

CATHODES; CMOS INTEGRATED CIRCUITS; DIODES; ELECTRIC DISCHARGES; MATHEMATICAL MODELS; MICROELECTRONICS; MICROPROCESSOR CHIPS; ROBUSTNESS (CONTROL SYSTEMS);

SILICON ON INSULATOR TECHNOLOGY;

EID: 16244377713     PISSN: 1078621X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. C. Putnam, et al, SOI Conference Proceedings, 2003.
2. N. Zamdmer, et al, VLSI Proceedings, 2001.
3. E. Grund and R. Gauthier, EOS/ESD Symposium, 2003.
4. T. Maloney and N. Khurana, EOS/ESD Symposium, 1985.
5. E. Grund and R. Gauthier, EOS/ESD Symposium, 2004.
6. A. Wang, On-Chip ESP Protection for Integrated Circuits, Kluwer Academic Publishers, 2002