High-speed demonstration of single-flux-quantum cross-bar switch up to 50 GHz

IEEE Transactions on Applied Superconductivity

Volumn 15, Issue 1, 2005, Pages 6-10

  Kameda, Yoshio ^a   Yorozu, Shinichi ^a   Hashimoto, Yoshihito ^a   Terai, Hirotaka ^b   Fujimaki, Akira ^c   Yoshikawa, Nobuyuki ^d  

^a SUPERCONDUCTIVITY RESEARCH LABORATORY   (Japan)

^b NATIONAL INSTITUTE OF INFORMATION AND COMMUNICATIONS TECHNOLOGY   (Japan)

^c NAGOYA UNIVERSITY   (Japan)

^d YOKOHAMA NATIONAL UNIVERSITY   (Japan)

Author keywords

Cell based design; Logic circuit; Single flux quantum (SFQ) circuit; Timing analysis

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER SIMULATION; DATABASE SYSTEMS; FLIP FLOP CIRCUITS; JOSEPHSON JUNCTION DEVICES; QUANTUM ELECTRONICS; SIGNAL PROCESSING; THROUGHPUT; TIMING CIRCUITS;

CELL-BASED DESIGN; PACKET SWITCHES; SINGLE-FLUX QUANTUM (SFQ) CIRCUIT; TIMING ANALYSIS;

LOGIC CIRCUITS;

EID: 15944415398     PISSN: 10518223     EISSN: None     Source Type: Journal    
DOI: 10.1109/TASC.2004.839771     Document Type: Article

References (8)

1. K. K. Likharev and V. K. Semenov, "RSFQ logic/memory family: a new Josephson-junction technology for sub-terahertz-clock frequency digital systems," IEEE Trans. Appl. Supercond., vol. 1, no. 1, pp. 3-28, Mar. 1991.
2. Y. Kameda, S. Yorozu, and S. Tahara, "SFQ standard cell-based circuit design of internal link speeded-up Batcher-Banyan packet switch," IEEE Trans. Appl. Supercond., vol. 11, no. 1, pp. 322-325, Mar. 2001.
3. Y. Kameda, S. Yorozu, M. Hidaka, and S. Tahara, "Successful operation of single-flux-quantum 2×2 unit switch," Physica C, Supercond. Applicat., pt. 2, vol. 378-381, pp. 1466-1470, Oct. 2002.
4. Y. Kameda, S. Yorozu, H. Terai, and A. Fujimaki, "High-speed operation of a single-flux-quantum (SFQ) cross/bar switch up to 35 GHz," Jpn. J. Appl. Phys., vol. 42, no. 4B, pp. 2163-2166, Apr. 2003.
5. S. Yorozu, Y. Kameda, H. Terai, A. Fujimaki, T. Yamada, and S. Tahara, "A single flux quantum standard logic cell library," Physica C, Supercond. Applicat., pt. 2, vol. 378-381, pp. 1471-1474, Oct. 2002.
6. Y. Kameda and S. Yorozu, "Automatic Josephson-transmission-line routing for single-flux-quantum cell-based logic circuits," in Extended Abstract of ASC 2002, Houston, TX, Aug. 2002, Paper 4EC-05.
7. T. Yamada, A. Sekiya, A. Akahori, H. Akaike, A. Fujimaki, H. Hayakawa, Y. Kameda, S. Yorozu, and H. Terai, "On-chip test of the shift register for high-end network switch based on cell-based design," Supercond. Sci. Technol., vol. 14, pp. 1071-1074, 2001.
8. S. Nagasawa, Y. Hashimoto, H. Numata, and S. Tahara, "A 380 ps, 9.5 mW Josephson 4-Kbit RAM operated at a high bit yield," IEEE Trans. Appl. Supercond., vol. 5, no. 2, pp. 2447-2452, Jun. 1995.