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Volumn 2144, Issue , 2001, Pages 155-160

Coverability analysis using symbolic model checking

Author keywords

[No Author keywords available]

Indexed keywords

SOFTWARE TESTING; WELL TESTING;

EID: 15744386217     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-44798-9_13     Document Type: Conference Paper
Times cited : (6)

References (17)
  • 1
    • 84947230952 scopus 로고    scopus 로고
    • Example of Hardware Verification Using VIS
    • Adnan Aziz, Example of Hardware Verification Using VIS, The benchmark PCI local BUS, http://www-cad.eecs.berkeley.edu/Respep/Research/vis /texas-97/.
    • The Benchmark PCI Local BUS
    • Aziz, A.1
  • 2
  • 8
    • 84937461982 scopus 로고    scopus 로고
    • I’m Done Simulating; Now What? Verification Coverage Analysis and Correctness Checking of the DECchip 21164 Alpha Microprocessor
    • M. Kantrowitz, L. M. Noack, “I’m Done Simulating; Now What? Verification Coverage Analysis and Correctness Checking of the DECchip 21164 Alpha Microprocessor”, Proc. DAC’96.
    • Proc. DAC’96
    • Kantrowitz, M.1    Noack, L.M.2
  • 9
    • 0027150951 scopus 로고
    • Cost Effective Generation of Minimal Test Sets for Stack-At Faults in Combinatorial logic Circuits
    • S. Kajihara, I. Pomerantz, K. Kinoshita and S. M. Reddy, “Cost Effective Generation of Minimal Test Sets for Stack-At Faults in Combinatorial logic Circuits”, 30th ACM/IEEE DAC, pp. 102-106, 1993.
    • (1993) 30Th ACM/IEEE DAC , pp. 102-106
    • Kajihara, S.1    Pomerantz, I.2    Kinoshita, K.3    Reddy, S.M.4
  • 13
    • 84937461984 scopus 로고
    • Protocol Verification: The first ten years, the next ten years; some personal observations
    • Testing, andVerification X
    • Raymond E. Miller, Protocol Verification: The first ten years, the next ten years; some personal observations, in Protocol specification, Testing, andVerification X, 1990.
    • (1990) Protocol Specification
    • Miller, R.E.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.