Fault Verification Simulation for Light-Emission Microscopy and Liquid-Crystal Analysis

Conference Proceedings from the International Symposium for Testing and Failure Analysis

Volumn 1996-November, Issue , 1996, Pages 121-126

  Kuji, N ^a   Takeda, T ^a   Nakamura, S ^a   Komine, Y ^a  

^a NTT CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER CIRCUITS; DISPLAY DEVICES; FAILURE ANALYSIS; LIGHT EMISSION; LSI CIRCUITS; SPICE;

CMOS DEVICES; LEAK FAULTS; LEAK RESISTANCE; LIGHT EMISSION MICROSCOPY; LIQUID-CRYSTALS; LOGIC MODELS; MODEL DERIVATIONS; SPICE SIMULATIONS;

LIQUID CRYSTALS;

EID: 1542344227     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.31399/asm.cp.istfa1996p0121     Document Type: Conference Paper

References (4)

1. Shigeru Nakajima, Takemi Ueki, Satoshi Tazawa, Katsuyuki Ochiai, Shinji Nakamura, Yukio Komine, and Tadao Takeda, "A quick failure analysis for Idd leakage," Proc. of ISTFA 1993, pp. 249-255.
2. R. C. Aitken, "Finding Defects with Fault Models," ITC1995 Proceedings, pp. 498-505.
3. Hong Hao and Edward J. McCluskey, "Resistive Shorts within CMOS Gates," ITC 1991 Proceedings, pp. 292-301.
4. Peter C. Maxwell and Robert C. Aitken, "Biased Voting: A Method for Simulating CMOS Bridging Faults in the Presence of Variable Gate Logic Thresholds," ITC 1993 Proceedings, pp. 63-72.