A critical analysis of application-adaptive multiple clock processors

Proceedings of the International Symposium on Low Power Electronics and Design

Volumn 2003-January, Issue , 2003, Pages 278-281

  Talpes, E ^a   Marculescu, D ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

Algorithm design and analysis; Circuits; Clocks; Design methodology; Energy management; Fabrication; Frequency; Microprocessors; Permission; Voltage

Indexed keywords

CLOCKS; ECONOMIC AND SOCIAL EFFECTS; ELECTRIC POTENTIAL; ENERGY MANAGEMENT; FABRICATION; INTEGRATED CIRCUIT DESIGN; LOW POWER ELECTRONICS; MICROPROCESSOR CHIPS; NETWORKS (CIRCUITS); POWER ELECTRONICS; POWER MANAGEMENT;

ALGORITHM DESIGN AND ANALYSIS; DESIGN METHODOLOGY; DYNAMIC POWER MANAGEMENT; FABRICATION TECHNOLOGIES; FREQUENCY; INTERDOMAIN COMMUNICATION; PERMISSION; POWER-PERFORMANCE TRADE-OFFS;

DESIGN;

EID: 1542269334     PISSN: 15334678     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/LPE.2003.1231877     Document Type: Conference Paper

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