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Volumn 13, Issue 1-2, 2004, Pages 1-46

Derandomizing polynomial identity tests means proving circuit lower bounds

Author keywords

Circuit lower bounds; Derandomization; Hardness randomness tradeoffs; Polynomial identity testing

Indexed keywords


EID: 15244352005     PISSN: 10163328     EISSN: 14208954     Source Type: Journal    
DOI: 10.1007/s00037-004-0182-6     Document Type: Review
Times cited : (377)

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