NAND-type DRAM-on-SGT

IEEE Transactions on Electron Devices

Volumn 52, Issue 3, 2005, Pages 427-429

  Nakamura, Hiroki ^a   Sakuraba, Hiroshi ^a   Masuoka, Fujio ^a  

^a TOHOKU UNIVERSITY   (Japan)

Author keywords

Gain cell; NAND type DRAM; Surrounding gate transistor (SGT)

Indexed keywords

CAPACITORS; ELECTRIC POTENTIAL; EQUIVALENT CIRCUITS; GATES (TRANSISTOR); LITHOGRAPHY; SEMICONDUCTOR DEVICE MANUFACTURE;

GAIN CELL; NAND TYPE DRAM; SURROUNDING GATE TRANSISTOR (SGT);

DYNAMIC RANDOM ACCESS STORAGE;

EID: 15044362585     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2004.842717     Document Type: Article

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